1. Field
The present embodiment relates to a parameter control circuit controlling circuit characteristics automatically according to an operation clock in an interface circuit, a clock generation circuit, or the like which inputs and outputs a digital signal in high speed between or within LSI (large Scale Integrated Circuit) devices, between boards, between apparatuses, or the like.
2. Description of the Related Art
Recently, in the computer field and the telecommunication field, information amount to be processed has been dramatically increased and performance improvement of the entire system has been required. To improve the performance of the system, it is necessary to improve performance in apparatuses including the system and each component configuring the apparatuses. For example, high speed operation has been realized in memories such as SRAM (Static Random Access Memory) and DRAM, processors, LSIs for network switching, etc.
Meanwhile, it is necessary to process a digital signal in high speed for signal transmission between LSI devices, signal transmission between multiple elements within the LSI device or between circuit blocks, signal transmission between boards or network apparatuses, etc. In particular, it is required to realize a high speed interface circuit inputting and outputting a signal between LSI devices, elements, boards, and apparatuses.
However, frequently these interface circuits are required to have downward compatibility and need to operate at two or more operation frequencies. For example, the HDMI (High-Definition Multimedia Interface: digital interface for image) operates at a lower frequency for a lower resolution and operates at a higher frequency for a higher resolution. Further, the USB (Universal Serial Bus: general-purpose serial interface) has different operation speeds between Ver. 1.1 and Ver. 2.0. Similarly, the PCI (Peripheral Component Interconnect) Express (personal computer interface) has two versions, Gen 1 and Gen 2, and the SATA (Serial Advanced Technology Attachment: hard disk interface) has Ver. 1 and Ver. 2 which are different in speed.
In particular, serial interface circuits are recently used frequently and such serial interface circuits include analog circuits operating at ultrahigh speeds. The analog circuits are not always easy to operate at lower clock frequencies differently from digital circuits and operate optimally only in certain ranges.
To solve such a problem, there is an idea to realize different circuit characteristics by changing circuit parameters thereof. For example, a parameter for frequency is preliminarily stored in a ROM (Read Only Memory) or the like and the circuit characteristics are changed by selecting the parameter stored in the ROM. As such a conventional technique, a document (Japanese Laid-open Patent Publication No. H11-220342) discloses a technique changing a bias in an electric power amplification circuit.
As described above, a typical analog circuit configuring the interface circuit has a tendency to operate optimally in a certain frequency range, and it is difficult to design a circuit operating always optimally in the interface circuit which inputs and outputs a signal with a low speed to a high speed. When designed unreasonably, the analog circuit sometimes has a performance deteriorating significantly outside a limited frequency range.
Further, if the parameter is preliminarily stored in the ROM or the like as disclosed in the above document, when kinds of the interfaces increase, kinds of the operation speeds increase and operation modes are diversified in future, it becomes necessary to update data stored in the ROM in each case. And further, it becomes difficult to manage what circuit corresponds to what version of the interface.